View MIC59P60YN_8625707.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

mic 59p60 8 - bit serial - input protected latched driver micrel inc. ? 2180 fortune drive ? san jose, ca 95131 ? usa ? tel +1 (408) 944 - 0800 ? fax + 1 (408) 474 - 1000 ? http://www.micrel.com august 4 , 2015 revision 2.0 general description the mic59p60 serial - input latched driver is a high - voltage (80v), high - current (500ma) integrated circuit comprised of eight cmos data latches, a bipolar darlington transistor driver for each latch, and cmos control circuitry for the common clear, strobe, clock, serial data input, and output enable functions. a dditional protection circuitry supplied on this device includes thermal shutdown, undervoltage lockout (uvlo), and overcurrent shutdown. the bipolar/cmos combination provides an extremely low - power la tch with maximum interface flexibility. the mic59p60 has open - collector outputs capable of sinking 500ma , and integral diodes for inductive load transient suppression with a minimum output breakdown voltage rating of 80v (50v sustaining). the drivers can b e operated with a split supply, where the negative supply is down to ? 20v and may be paralleled for higher load current capability. using a 5v logic supply, the mic59p60 will typically operate at better than 5mhz. with a 12v logic supply, significantly hig her speeds can be obtained. the cmos inputs are compatible with standard cmos, pmos, and nmos circuits. ttl circuits may require pull - up resistors. by using the serial data output, drivers may be cascaded for interface applications requiring additional dri ve lines. each of the eight outputs ha s an independent overcurrent shutdown of 500m a. upon over - current shutdown, the affected channel will turn off , and the flag will go low until v dd is cycled or the enable/reset pin is pulsed high. current pulses less t han 2s will not activate current shutdown. temperatures above 165 c will shut down the device and activate the error flag. the uvlo circuit prevents operation at low v dd ; hysteresis of 0.5v is provided. datasheets and support documentation are available on micrel?s web site at : www.micrel.com . features ? 3.3mhz minimum data input r ate ? output current shutdown (500ma t ypical) ? underv oltage l ockout ? thermal s hutdown ? output f ault f lag ? cmos, pmos, nmos, and ttl c ompatible ? in ternal p ull - up/p ull - d own r esistors ? low - power cmos logic and l atches ? high - voltage c urrent sink o utputs ? output transient - protection d iodes ? single or split supply o peration
micrel, inc. mic59p60 a ugust 4 , 2015 2 revision 2.0 functional diagram
micrel, inc. mic59p60 a ugust 4 , 2015 3 revision 2.0 ordering information part number junction temperature range package pb - free mic 59p60yn ? 40 c to +85c 20- pin plastic dip mic59p60yv ? 40c to +85c 20- pin plcc micp60ywm ? 40c to +85c 20- pin wide soic pin configuration 20- pin plcc (v) (top view) 20- pin pdip (n ) 20- pin wide soic (wm) (top view) pin description pin number pin name pin function 1 clear sets all latches off (open). 2 , 10 vee output ground (substrate). most negative voltage in the system connects here. 3 clock serial data clock. a clear must also be clocked into the latches. 4 serial data in serial data input pin. 5 vss logic reference (ground) pin. 6 vdd logic positive supply voltage. 7 serial data out serial data output pin. (flow through). 8 strobe output strobe pin. loads output latches when high. a strobe is needed to clear latches. 9 oe / reset when l ow, o utputs are active. when h igh, device is inactive and reset from a fault condition. an under voltage condition emulates a high oe/reset input.
micrel, inc. mic59p60 a ugust 4 , 2015 4 revision 2.0 pin description (continued) pin number pin name pin function 11 k transient suppression diode?s cathode common pin. 12 ? 19 out n open collector outputs 8 through 1. 20 flag error flag. open - collector output is low upon overcurrent or overtemperature fault. o e/ reset must be pulled high to reset the flag and fault condition. typical inputs typical output driver
micrel, inc. mic59p60 a ugust 4 , 2015 5 revision 2.0 absolute maximum ratings ( 1 ) output voltage (v ce ) ................................ .................... +80v output voltage (v ce(sus) ) (3) ................................ ........... +50v supply voltage (v dd ) with reference to v ss ................. +15v supply voltage (v dd ) with reference to v ee ................. +25v emitter supply voltage (v ee ) ................................ ........ ? 20v input voltage range (v in ) ..................... ? 0.3v to v dd +0.3v protective current (4) ................................ ...................... 1.5a storage temperature range (t s ) ............. ? 65 c to +150 c esd rating (5) (6) ................................ .............. esd sensitive operating ratings ( 2 ) package power dissipation , p d plastic dip (n) ................................ ............................. 2 . 0 w derate above t a = +25c ................................ ..... 20 mw/c plcc (v) ................................ ................................ ..... 1.4w derate above t a = +25c ................................ ..... 16mw/c wide soic (wm) ................................ ........................ 1. 2 w derate above ta = +25c ................................ ..... 12 mw/c operating temperature range (t a ) ............ ? 40c to +85c electrical characteristics ( 7) v dd = 5v, v ss = v ee = 0v; t a = +2 5c, unless noted. symbol parameter condition min . typ . max . units i cex output leakage current v out = 80v 50 a v out = 80v, t a = 70 c 100 v ce(sat) collector - emitter saturation voltage i out = 100ma 0.9 1.1 v i out = 2 00ma 1.1 1.3 i out = 35 0ma 1.3 1.6 v ce(sus ) collector - emitter s ustaining voltage i out = 35 0ma , l = 2mh 50 v v in ( 0 ) input voltage 1.0 v v in ( 1 ) v dd = 12v 10.5 v v dd = 10v 8.5 v dd = 5v ( 8 ) 3.5 r in input resistance v dd = 12v 50 200 k? v dd = 10v 50 300 v dd = 5v 50 600 i ol flag output current v ol = 0.4v 15 ma i o h flag output leakage 50 na notes: 1. exceeding the absolute maximum ratings may damage the device. 2. the device is not guaranteed to function outside its operating ratings. 3. for inductive load applications. 4. each channel. vee connection must be designed to minimize inductance and resistance. 5. devices are i nput- static protected but can be damaged by extremely high static charges. 6. devices are esd sensitive. handling precautions are recommended. human body model, 1.5k ? in series with 100pf. 7. specification for packaged product only 8. operation of these devices wit h standard ttl or dtl may require the use of appropriate pull - up resistors to insure a minimum logic "1".
micrel, inc. mic59p60 a ugust 4 , 2015 6 revision 2.0 electrical characteristics ( 7) v dd = 5v, v ss = v ee = 0v; t a = +2 5c, unless noted. symbol parameter condition min . typ . max . units i dd(on) supply current all drivers on, v dd = 12v 6.4 10.0 ma all drivers on, v dd = 10v 6.0 9.0 all drivers on, v dd = 5v 4.6 7.5 i dd(1 output) one driver on, all others off, v dd = 12v 3.1 4.5 ma one driver on, all others off, v dd = 10v 2.9 4.5 one driver on, all others off, v dd = 5v 2.3 3.6 i dd(off) all drivers off, v dd = 12v 2.6 4.2 ma all drivers off, v dd = 10v 2.4 3.6 all drivers off, v dd = 5v 1.9 3.0 i r clamp diode leakage current v r = 80v 50 a v f clamp diode forward voltage i f = 350ma 1.7 2.0 v i lim overcurrent shutdown threshold 500 ma v su start - up voltage note 9 3.5 4.0 4.5 v v dd min minimum supply (v dd ) 3.0 3.5 4.0 v thermal shutdown 165 c thermal shutdown hyst eresis 10 c note: 9. undervoltage lockout is guaranteed to release device at no more than 4.5v, and disable the device at no less than 3.0v .
micrel, inc. mic59p60 a ugust 4 , 2015 7 revision 2.0 test circuit timing conditions (t a = +25c, logic levels are v dd and v ss , v dd = 5v) a. typical data active time before clock pulse (data set - up time) ................................ ................................ .................. 75ns b. minimum data active time after clock pulse (data hold time) ................................ ................................ ..................... 75ns c. minimum data pulse width ................................ ................................ ................................ ................................ ......... 150ns d. minimum clock pulse width ................................ ................................ ................................ ................................ ........ 150ns e. minimum time betwee n clock activation and strobe ................................ ................................ ................................ .. 300ns f. minimum strobe pulse width ................................ ................................ ................................ ................................ ..... 100ns g. typical time between strobe activation and output transition ................................ ................................ .................. 500ns serial data present at the input is transferred to the shift register on the logic ?0? to logic ?1? transiti on of the clock input pulse. on succeeding clock pulses, the registers shift data information towards the serial data output. the serial data must appear at the input prior to the rising edge of the clock input waveform. holding clear high results in a dat a logic "0" being clocked into the shift register, turning off respective channels. information present at any register is transferred to its respective latch when the strobe is high (serial - to - parallel conversion). the latches will continue to accept new data as long as the strobe is held high. applications where the latches are bypassed (strobe tied high) will require that the enable input be high to prevent invalid output states. when the enable input is high, all of the output buffers are disabled (off) without affecting information stored in the latches or shift register. with the enable input low, the outputs are controlled by the state of the latches. a positive oe/reset pulse resets the flag and the output after a current shutdown fault. over - tempera ture faults are not latched and require no reset pulse.
micrel, inc. mic59p60 a ugust 4 , 2015 8 revision 2.0 mic59p60 truth table serial data input clear input clock input shift register contents serial data output strobe input latch contents output enable output contents i 1 i 2 i 3 ?? i 8 i 1 i 2 i 3 ?? i 8 i 1 i 2 i 3 ?? i 8 h h r 1 r 2 ?? r 7 r 7 l l r 1 r 2 ?? r 7 r 7 x r 1 r 2 r 3 ?? r 8 r 8 h o o o?? o l x x x?? x x l r 1 r 2 r 3 ?? r 8 p 1 p 2 p 3 ?? p 8 p 8 h p 1 p 2 p 3 ?? p 8 l p 1 p 2 p 3 ?? p 8 x x x ?? x h h h h ?? h note: l = low logic level h = high logic level x = irrelevant p = present state r = previous state o = output off
micrel, inc. mic59p60 a ugust 4 , 2015 9 revision 2.0 typical characteristics
micrel, inc. mic59p60 a ugust 4 , 2015 10 revision 2.0 maximum allowable duty cycle (plastic dip) v dd = 5.0v number of outputs on (i out = 200ma v dd = 5.0v) max. allowable duty cycle at ambient temperature of 25c 40c 50c 60c 70c 8 85% 72% 64% 55% 46% 7 97% 82% 73% 63% 53% 6 100% 96% 85% 73% 62% 5 100% 100% 100% 88% 75% 4 100% 100% 100% 100% 93% 3 100% 100% 100% 100% 100% 2 100% 100% 100% 100% 100% 1 100% 100% 100% 100% 100% v dd = 12v number of outputs on (i out = 200ma v dd = 12v) max. allowable duty cycle at ambient temperature of 25c 40c 50c 60c 70c 8 80% 68% 60% 52% 44% 7 91% 77% 68% 59% 50% 6 100% 90% 79% 69% 58% 5 100% 100% 95% 82% 69% 4 100% 100% 100% 100% 86% 3 100% 100% 100% 100% 100% 2 100% 100% 100% 100% 100% 1 100% 100% 100% 100% 100%
micrel, inc. mic59p60 a ugust 4 , 2015 11 revision 2.0 typical application protected solenoid driver with output enable hammer driver
micrel, inc. mic59p60 a ugust 4 , 2015 12 revision 2.0 protected negative/positive pin diode driver transmit/receive switch
micrel, inc. mic59p60 a ugust 4 , 2015 13 revision 2.0 package information and recommended landing pattern ( 10) 20- pin 300mil plastic pdip (n ) 20- pin wide soic (wm) note: 10. package information is correct as of the publication date. for updates and most current information, go to www.micrel.com .
micrel, inc. mic59p60 a ugust 4 , 2015 14 revision 2.0 package information and recommended landing pattern ( 10) (continued) 20- pin plcc (v)
micrel, inc. mic59p60 a ugust 4 , 2015 15 revision 2.0 micrel, inc. 2180 fortune drive san jose, ca 95131 usa tel +1 (408) 944 - 0800 fax +1 (408) 474- 1000 web http://www.micrel.com micrel, inc. is a leading global manufacturer of ic solutions for the worldwide high pe rformance linear and power, lan, and timing & communications markets. the company?s products include advanced mixed - signal, analog & power semiconductors; high - performance communication, clock management , mems - based clock oscillators & crystal - less clock generators, ethernet switch es, and physical layer transceiver ics. company customers include leading manufact urers of enterprise, consumer, industrial, mobile, telecommunications, automotive, and computer products. corporation headquarters and state - of- the - art wafer fabrication facilities are located in san jose, ca, with regional sales and support offices and advanced technology design centers situated throughout the americas, europe , and asia. additionally , the company maintains an extensive network of distributors and reps worldwide. micrel makes no representations or warranties with respect to the accuracy or completeness of the inf ormation furnished in this data sheet. this information is not intended as a warranty and micrel does not assume responsibility for its use. micrel reserves the right to change circuitry, specifications and descriptions at any ti me without notice. no license, whether express, implied, arising by estoppel or otherwise, to any intellectual property rights is granted by this document. e xcept as provided in micrel?s terms and conditions of sale for such products, micrel assumes no li ability whatsoever, and micrel disclaims any express or implied warranty relating to the sale and/or use of micrel products including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copy right , or other intellectual property right. micrel products are not designed or authorized for use as components in life support appliances, devices or systems where mal function of a product can reasonably be expected to result in personal injury. life s upport devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. a purchaser?s u se or sale of micrel products for use in life support appliances, devices or systems is a purchaser?s own risk and purchaser agrees to fully indemnify micrel for any damages resulting from such use or sale. ? 2001 micrel, incorporated.

▲Up To Search▲

Price & Availability of MIC59P60YN

	To Download MIC59P60YN Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .